Welcome to the Cogita-PRO BitStream, the first in a series of technical articles discussing Vtool’s EDA tool designed to help DV engineers explore and gain a deeper understanding of their designs.
Verification Analytics represents an emerging category of EDA tools. Verification processes generate extensive data, particularly from simulation and emulation runs. While you may have some scripts to extract certain pieces of information, the reality is that much of this valuable data remains untapped.
Other industries have already realized the benefits of big data analysis, leveraging advanced algorithms to uncover patterns, anomalies, and correlations. Now, these cutting-edge techniques are available to DV engineers, providing new ways to analyze and interpret verification data.
Cogita-PRO processes your data—primarily logfiles and waveforms—and applies advanced analytics along with AI/ML modeling. This enables you to quickly gain insights into both the design and verification space. The tool offers visual and algorithmic analytics to answer a variety of important questions, including:
It is important to note that Cogita-PRO is not an AI generative tool designed to create your testbench or stimuli—there are already many such tools available and perhaps you are exploring their efficacy. Rather, Cogita-PRO is essential whether or not you are considering using generative or agentic AI in the semiconductor design process. It helps you understand the actions taken by AI or humans and builds confidence in the final product. As a result, Verification Analytics becomes a critical sign-off step in the DV flow.
The first production version of Cogita-PRO has been released and is already being used by customers and users worldwide at leading semiconductor companies. We are deeply grateful to our partners for their contributions in making Cogita-PRO ready for industry use, and we eagerly anticipate welcoming new customers interested in exploring the world of Verification Analytics.